Radyne DM240XR Especificaciones Pagina 81

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DM240XR High-Speed Digital Modulator Rear Panel Interfaces
MN-DM240XRRevision 13 5–11
Table 5-9. HSSI (High-Speed Serial Interface) 50-Pin Connector
Pin No. (+) Pin No. (–) Signal Name Description Direction
20 - 23
45 - 48
4 Ancillary
from DCE
Reserved Output
24 49 TM Test Mode Output-
5.12.6 Ethernet 100/1000 Base-T Interface
The PIIC Ethernet Data Interface (Figure 5-1e) is a full duplex 100/1000 BaseT supported by an
RJ45 connector . The EDI supports the input of generic UDP packets or ProMPEG COP3
formatted packets. With the Pro-MPEG input, a powerful video-specific packet-based forward
error correction (FEC) algorithm is also available providing a cost-effective solution for error
recovery in video streams transported over public or private IP networks.
5.12.7 EIA-530 /RS-422 Serial Interface
The EIA-530 Port is an RS-422 Connection. It is a 25-Pin Female “D” Connector. Refer to
Figure 5-1i and Table 5-10 for pinouts.
Table 5-10. RS530 (RS-422) Connector
Pin No. Signal Name Signal Direction
1 Shield --- ---
2 Send Data A (-) SD-A Input
4 Request To Send A (-) RS-A Input
5 Clear To Send A (-) CS-A Output
6 DCE Ready) DM-A Output
7 Signal Ground SGND ---
11 Terminal Timing B (+) TT-B Input
12 Send Timing B (+) ST-B Output
13 Clear T Send B (+) CS-B Output
14 Send Data B (+) SD-B Input
15 Send Timing A (-) ST-A Output
18 Local Loopback LL Input
19 Request To Send B (+) RS-B Input
20 Data Terminal Ready A (-) TR-A Input
21 Remote Loopback RL Input
22 Ring Indicator IC Output
23 Signal Common RC
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